In most pulse circuits, input information is applied in the form of a random sequence of pulses. These pulses cause the information stored in such circuits to change from one binary state to another binary state. In order to appreciate and discuss the problems encountered in prior art circuits, reference is made to FIGS. 1A and 1B where a sequence of input pulses P.sub.i is shown. Upon arrival of an input pulse P.sub.1, the information stored in the circuit changes from one logic state, present before the arrival of P.sub.1, to another logic state. In this type of circuit, a potential exists for each of the two states. For example, a high potential may represent a logic "1," while a low potential may represent a logic "0." Usually the changes in potential in response to the input pulses P.sub.i take place with a certain delay caused by the various switching time responses and time constants of the elements constituting the circuit.
As shown in FIG. 1A, after application of input pulse P.sub.1, a time interval elapses before reaching the "low" potential corresponding to the "new" logic state. Similarly, upon application of another input pulse such as P.sub.2, the potential changes from a "low" state, present before the arrival of P.sub.2, to a "high" state. After application of P.sub.2, some time interval elapses before the "high" potential level is reached. Each of these two time intervals may be split into two components, namely a delay time which elapses before the potential starts to change, and a transition time during which the actual change takes place.
Referring now to FIG. 1B, if one considers any two potential changes, for example -- one to a low state and one to a high state -- on a relative time base starting with zero at the respective input pulses, it appears that the respective delay times and transition times for the two changes are unequal. Therefore, an input time pattern of pulses P.sub.i will not be preserved at the output of such prior art circuits. Furthermore, at high rates approaching or exceeding 100 MHz, differences of nanoseconds or fractions of a nanosecond would render the original information distorted to such an extent that it would become irretrievable. Therefore, a time pattern correction or modification of the output signals is required prior to reading or using the content of the information.
Use of plate-catching diode arrangements to shorten the rise time of pulses is described at pages 134-135 of the book by J. Millman and H. Taub entitled "Pulse and Digital Circuits" published by McGraw-Hill Book Company, Inc., 1956. In this known arrangement, a pair of diodes coupled to the plate of a triode are used to limit the swing of the output pulses thereby shortening their rise time. Such an arrangement does not affect the width of a pulse at a predetermined potential level since such width remains constant before as well as after the clipping actions of the diodes. In other words, in this known arrangement, only the upper and lower limits of the pulses are modified by the clipping voltages applied to the diodes without affecting the time pattern of the pulses. Another diode-limiting circuit, referred to as a collector-catching diode circuit, is described at pages 351-352 of the book by J. M. Doyle entitled "Pulse Fundamentals," Second Edition, 1973. This known circuit presents the same disadvantages as discussed above with reference to the Millman and Taub arrangement, namely the circuit does not and cannot correct or modify the time pattern of pulses.